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Pin Reference

The ESP32-S3 provides a generous set of GPIOs by microcontroller standards, but the 16-bit RGB parallel display interface consumes nineteen of them in one stroke. Understanding exactly which pins are committed to which peripheral — and which remain available for your application — is essential for effective hardware design around this board. The CH422G IO expander partially compensates for this GPIO pressure by offloading several control signals to the I2C bus, but the allocation still requires careful planning.

The display uses a 16-bit RGB565 parallel interface, meaning five bits for red, six for green, and five for blue — plus synchronization and clock signals. The ESP32-S3’s LCD peripheral drives these pins directly at the pixel clock rate (21 MHz). Because there are not enough GPIOs to support full 24-bit RGB888 color, the lower bits of each color channel (R0-R2, G0-G1, B0-B2) are tied to GND on the PCB, fixing them at zero. The visible result is 65K colors, which is more than sufficient for LVGL interfaces and typical embedded UI work.

GPIOFunctionDescription
IO0R4Red channel bit 4
IO1B6Blue channel bit 6
IO2B5Blue channel bit 5
IO3VSYNCVertical sync
IO4R3Red channel bit 3 (LSB)
IO5DEData enable
IO6G3Green channel bit 3 (LSB)
IO7PCLKPixel clock (21 MHz)
IO14B3Blue channel bit 3 (LSB)
IO21G7Green channel bit 7 (MSB)
IO38B4Blue channel bit 4
IO39G2Green channel bit 2
IO40R7Red channel bit 7 (MSB)
IO41R6Red channel bit 6
IO42R5Red channel bit 5
IO45G4Green channel bit 4
IO46HSYNCHorizontal sync
IO47B7Blue channel bit 7 (MSB)
IO48G5Green channel bit 5

The board routes a single I2C bus to three on-board devices and an external expansion header. All devices share the same SDA/SCL pair, and proper I2C address management is critical to avoid bus collisions.

GPIOFunctionDevices
IO8SDAGT911 touch, CH422G IO expander, PCF85063A RTC
IO9SCLGT911 touch, CH422G IO expander, PCF85063A RTC
AddressDeviceFunction
0x20-0x27CH422GIO expander (8-address range)
0x51PCF85063AReal-time clock (Type B only)
0x5DGT911Capacitive touch controller

The board provides two industrial serial buses and a shared UART path for programming. The CAN and RS-485 interfaces use dedicated transceivers with screw terminal connections on the board edge.

InterfaceGPIOFunction
RS-485 TXIO43UART TX to SP3485 transceiver
RS-485 RXIO44UART RX from SP3485 transceiver
CAN TXIO15TWAI TX to TJA1051T transceiver
CAN RXIO16TWAI RX from TJA1051T transceiver

Note that IO43 and IO44 are shared between the RS-485 transceiver and the CH343P USB-UART bridge. The FSUSB42 multiplexer (controlled by CH422G EXIO5) determines which path is active. During firmware upload, the USB-UART path is selected; during normal operation, the firmware can switch to the RS-485 path.

The microSD card slot operates in SPI mode. Three of the four SPI signals use dedicated GPIOs, while the chip select routes through the CH422G expander to conserve a GPIO pin.

GPIOFunction
IO11MOSI (Master Out, Slave In)
IO12SCK (Serial Clock)
IO13MISO (Master In, Slave Out)
CH422G EXIO4CS (Chip Select, active low)

The dual USB Type-C topology uses an analog multiplexer to share the ESP32-S3’s USB data pins between two physical ports.

GPIOFunctionNotes
IO43ESP_TXDUSB-UART via CH343P (Type-C2, programming port)
IO44ESP_RXDUSB-UART via CH343P (Type-C2, programming port)
IO19USB D-Native USB Host/OTG (Type-C1, side port)
IO20USB D+Native USB Host/OTG (Type-C1, side port)

The FSUSB42 multiplexer, controlled by CH422G EXIO5, switches between the UART bridge and native USB paths. Only one USB mode can be active at any given time.

The GT911 capacitive touch controller connects through the shared I2C bus with an interrupt line and an expander-controlled reset.

GPIOFunction
IO4TP_IRQ (touch interrupt, active low)
IO8TP_SDA (shared I2C data)
IO9TP_SCL (shared I2C clock)
CH422G EXIO1TP_RST (touch controller reset)

The interrupt line (IO4) signals the ESP32-S3 when a touch event occurs, allowing event-driven rather than polled touch handling. The reset line through CH422G EXIO1 enables software-controlled touch controller initialization and recovery from fault states.

The CH422G sits at the nexus of several board subsystems. Its outputs control critical functions that would otherwise consume scarce GPIOs. Understanding this mapping is essential for proper board initialization — the CH422G must be configured before the display, SD card, or USB multiplexer can function.

EXIO PinConnected ToFunction
EXIO1 (OC0)CTP_RSTTouch controller reset (active low)
EXIO2 (OC1)LCD_BLLCD backlight enable (high = on)
EXIO3 (OC2)LCD_RSTLCD panel reset (active low)
EXIO4 (OC3)SDCSSD card chip select (active low)
EXIO5 (IO0)USB_SELUSB switch control (FSUSB42 mux select)
EXIO0 / EXIO5DI0, DI1Isolated digital inputs (Type B)
OD0 / OD1DO0, DO1Isolated digital outputs (Type B)

The open-collector outputs (OC0-OC3) can sink current but require external pullups, which are provided on the PCB for each controlled signal. The bidirectional IO pins and open-drain outputs handle the isolated I/O channels on the Type B variant.

The ESP32-S3 samples certain GPIO states during reset to determine boot mode and voltage configuration. These pins must be in the correct state during power-on or reset, and care should be taken if connecting external circuits to them.

GPIODefaultPullFunction
IO0HIGH10K pullup to 3.3VBoot mode: HIGH = normal boot, LOW = download mode
IO45LOWInternal pulldownVDD_SPI voltage: LOW = 3.3V (default)
IO46LOWInternal pulldownBoot mode: LOW = SPI boot (default)

The BOOT button on the board pulls IO0 low when pressed. To enter download mode for firmware flashing, hold BOOT while pressing RESET (or during power-on), then release BOOT after the chip has sampled the pin state.

After accounting for all on-board peripherals, the following GPIOs remain available for user applications.

These GPIOs have no on-board connections and are fully available for user applications via the expansion headers:

GPIOADC ChannelNotes
IO17ADC2_CH6General purpose
IO18ADC2_CH7General purpose
IO35General purpose
IO36General purpose
IO37General purpose

The board exposes its interfaces through a variety of connectors suited to their intended use — FPC for display and touch ribbon cables, screw terminals for field-wired industrial buses, and pin headers for prototyping.

DesignatorTypeFunction
PORT140-pin FPC (0.5mm pitch)Display panel (RGB565 + backlight)
40-pin FPC (0.5mm pitch)Touch panel (GT911 I2C + interrupt)
Type-C1USB Type-C (side)Native USB Host/OTG
Type-C2USB Type-C (top)USB-UART programming (CH343P)
J13-pin screw terminalRS-485 (A, B, GND)
J73-pin screw terminalCAN bus (CANH, CANL, GND)
J5MX1.25 / PH2.0 2-pinLi-Po battery (3.7V)
H18-pin headerTouch panel breakout
H7Pin headerExpansion (I2C, ADC, GPIO)
H8Pin headerExpansion (power, GPIO)
TF card slotmicroSD (push-push, SPI mode)
CR927 holderRTC backup battery (Type B)